CBUS2 chipset

CBUS2 referred here is a core logic chipset used in the Sable/Lynx/Gamma systems (AlphaServers 2×00 and 2x00A). It is derived from CBUS used in the Cobra systems. In Tru64 code is it is referred as CBUS2; in Linux kernel code it is called T2.

The chipset consists of the top-level bus called CBUS, which is the main interconnect between the CPUs and the IO subsystem. CBUS has 8 nodes, from which 7 are pluggable and the 8th node is T2. T2 is the CBUS-to-PCI bridge.

Key features:

  • The chipset is introduced in 1994
  • Systems:
  • The number of CPUs: 1-4, EV4, EV45, EV5 or EV56
  • Maximal memory: 2GB for 1-3 CPUs, 1GB for 4 CPUs.
  • Supported OpenVMS: 6.1 and later
  • Supported DEC OSF/1, Digital UNIX, Tru64: 2.0B or 3.0(??) and later

Names used by the operating systems:

  • OpenVMS uses internal name CBUS. The CPU ROUTINES for Sable are 0902 and 0905 depending on the CPU. The CPU ROUTINES for Lynx are 1802 and 1805.
  • Tru64 uses internal name CBUS2.
  • Linux uses internal name T2.